Electronic circuits are generally tested to verify their proper operation; this is of the utmost importance to ensure a high quality of the production process of the electronic circuits. The tests may be performed on each electronic circuit at different levels of the corresponding production process: for example, a test process called EWS (Electrical Wafer Sort) is performed on the electronic circuits included in a corresponding wafer of semiconductor material, before the individual portions of the wafer on which there are integrated the electronic circuits are diced into individual chips and embedded in respective packages. Such test includes measurements performed on each electronic circuit by automatic test equipment, known as ATE. Such test apparatus is provided with a probe card, which substantially includes a printed circuit board comprising a plurality (typically, hundreds, or even thousands) of probes of conductive material for contacting corresponding conductive pads of the electronic circuits to be tested. During the test, the probe card is positioned in correspondence of a group of electronic circuits of the wafer so that the probes mechanically contact their pads (an operation that is called “probing”); this provides an electrical coupling between the test apparatus and the pads of such electronic circuits, which allows the test thereof. The same operations are repeated in succession on each group of electronic circuits of the wafer until all the electronic circuits formed therein have been tested.
In order to ensure that a proper probing procedure has been performed between each probe and the corresponding pad, typically before or after the test a (manual or automatic) checking operation is carried out, which consists of detecting and analyzing a probe mark left by the probe on the pad during the probing operation.
Being able to detect the presence and the arrangement of the probe marks allows first determining the correct alignment and centering between the probes of the probe card on the pads of the electronic circuits under test; in this way, it is possible to reconfigure the parameters of the probing so as to reduce the risk of damage of a passivation layer around the pad caused by a not totally accurate probing. Moreover, such risk is, in modern applications, very considerable, since the number of pads within a same electronic circuit is higher and higher, while their sizes and their relative separation distances are smaller and smaller.
Moreover, the analysis of the probe mark allows determining a correct and uniform pressure exerted by the probes of the probe card on the pads of the electronic circuits, so as to be able to act on the parameters of the probing in order to have a low and uniform contact resistance during the test.
However, in recent applications, the test EWS has drawbacks connected to the impracticality or impossibility of being able to perform such checking operation.
In fact, because of growing demands, especially in automotive applications, of electronic circuits capable of operating in adverse conditions (e.g., high temperatures), the pads (and the corresponding electric connections between the pads and respective terminals of the package) of such electronic circuits are more and more frequently formed by different materials with respect to those traditionally used (such as copper and aluminium). For example, US patent application No. US 2005/0073057, which is incorporated by reference, proposes a multi-layer pad structure having a high hardness property; such property is achieved by using a conductive material with high hardness (e.g., nickel or alloys thereof), possibly covered by a thin protective layer of a relatively soft conductive material (e.g., palladium or alloys thereof).
The greater hardness of such pads with respect to the materials traditionally used for making the probes results in that, during the probing, the pad is not scratched by the respective probe; in this way, the probe mark is difficult to detect or not detectable, so that it turns out to be very difficult, if not practically impossible, to perform the checking operation of the probing. This involves a substantial impracticality or impossibility to act on parameters of the probing, with consequent increase during the test of the cases of breakage of the passivation layer, and loss of electric yield (due to a high and heterogeneous contact resistance between each probe of the probe card and the corresponding pad), which imply possible false test failures, and correspondingly a reduction in the process yield with consequent increase of the production costs of the electronic circuits.
Moreover, the use of traditional probes for performing the probing on the pads causes further drawbacks, concerning the uniformity of the mechanical effort exerted by the probe on the pad, the lifetime of the probe itself, and the simplicity of its production process.
At the same time, the impracticality to impossibility of leaving the probe mark may be due in part to the mechanical properties of the specific type of probe used for the test.
To that, there is added also the fact that at high temperatures the material of the probe may oxidize, thereby deteriorating the electrical performance thereof, and this, for example, disadvantages materials such as tungsten with respect to copper.
Recently, probes (of the MEMS and vertical type) have been developed and marketed having a hardness greater than that of the pads with high hardness, and that therefore may leave, during the probing operation, the probe mark on the pad of the integrated circuit to be tested; however, due to limited current conduction capability which MEMS and vertical probes are affected by, their use does not provide satisfactory results during the test of integrated circuits for applications requiring relatively high work currents for their correct operation.
For this reason, typically, for testing the integrated circuits requiring high currents, cantilever probes are used, which have better mechanical properties—for example, elasticity—and better electrical properties, since they have better current transport features with respect to MEMS and verticals probes.
Often for carrying high levels of current, probes are made of materials with high electrical conductivity, for example, using materials such as copper.
A particular type of cantilever probe is shown in U.S. patent application No. U.S. 2008/0209719, which is incorporated by reference, and which includes a body of conductive material covered by materials apt to act as a coating for the probe (so as protect it from external contaminations); such probes can easily exhibit defects (such as, for example, coating cracks), which involve, during the probing, an uneven distribution of the mechanical stress exerted on the pad by the probe, which reflects, immediately, in a not optimal probing, and in the medium (or short) period, in the damage and possibly breakage of the probe itself (thereby requiring its replacement, which in turn involves the reconstruction of the whole probe card in which such probe is formed). The just mentioned drawbacks, as it is easily understandable, are exacerbated in the case that the pads of the electronic circuits to be tested have a high hardness.
Furthermore, the lapping operation of the probe tip (necessary for having an efficient coupling between it and the pad) causes the coating in correspondence of the tip to be removed, thus making necessary to perform a further coating process for restoring the coating eroded by it, which involves an evident complication of the manufacturing process with waste of time and ultimately costs increase.